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Low-voltage differential signaling (LVDS) is a high speed, low voltage, low power, and low noise general-purpose I/O interface standard. Its low-voltage swing and differential current mode outputs significantly reduce electromagnetic interference (EMI). These outputs have fast edge rates that cause signal paths to act as transmission lines. Therefore, ultra-high-speed board design and differential signal theory knowledge is especially useful for designing a board containing Altera devices that integrate LVDS.

National Application Note AN-1040: Application Note 1040 LVDS Performance: Bit Error Rate

National Application Note AN-1060: Application Note 1060 Low-Voltage Differential Signaling Yields Megatransfers per Second with Milliwatts of Power

National Application Note AN-1088: Application Note 1088 LVDS Signal Quality: Cable Drive Measurements using Eye Patterns Test Report #3

National Application Note AN-1110: Application Note 1110 LVDS Quad Dynamic I CC vs Frequency

National Application Note AN-1115: Application Note 1115 DS92LV010A Bus LVDS Transceiver Ushers in a New Era of High-Performance Backplane Design

National Application Note AN-1127: Application Note 1127 LVDS Display Interface

National Application Note AN-1173: Application Note 1173 High Speed BUS LVDS Clock DistributionUsing the DS92CK16 Clock Distribution Device

National Application Note AN-1194: Application Note 1194 Failsafe Biasing of LVDS Interfaces

National Application Note AN-971: Application Note 971 An Overview of LVDS Technology