USB3300 PHY Layout Guidelines

Chris — Thu, 24 Jan 2008 14:15:18 +0100

The Universal Serial Bus (USB) is capable of operating at 480 Mbps. Excellent signal integrity is required to operate reliably at high-speed data rates.The PCB layout is a critical component in maintaining signal integrity. This document provides recommendations regarding the PCB layout. This application note is written for a reader that is familiar with hardware design, USB protocols and the USB 2.0 specification. The goal of the application note is to provide information on sensitive areas of the PCB layout.

PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages

Chris — Thu, 24 Jan 2008 11:39:28 +0100

Intersil’s Quad Flat No Lead (QFN) package is a relatively new packaging concept that is currently experiencing rapid growth. It offers a variety of benefits including reduced lead inductance, a small sized “near chip scale” footprint, thin profile, and low weight. It also uses perimeter I/O pads to ease PCB trace routing, and the exposed copper die-pad technology offers good thermal and electrical performance.