PI6C110/PI6C110E Layout Guidelines

Chris — Thu, 24 Jan 2008 12:22:46 +0100

The PI6C110/110E is an integrated clock generator and SDRAM buffer, providing all the timing signals for the Intel Whitney 810/ 810E chipset. This brief provides the recommended connections for the PI6C110/110E clock generator to control EMI and to ensure proper device performance. Many of the following techniques can be applied to a variety of high-speed clock designs.