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A software driver for an SPI interface

A software driver for an SPI interface

This article will shortly recall the basics of SPI, it will also explain how to design a portable software driver in C language, and it will show a few waveforms of the SPI signals generated by the software driver.
Today the semiconductor market shows a wide range of SPI (Serial Peripheral Interface) peripherals, ranging from EEPROM serial memories, to A-to-D converters, Can controllers and many others.
Currently, many microcontrollers have a dedicated SPI controller integrated, able to efficiently and easily interface it to other devices throught the SPI bus. However, some microcontrollers don't support such a feature, but at least they usually have several general purpose programmable input/output pins, the so called GPIOs.
By means of those GPIO, it is possible, as we will further show, to implement a software driver capable to interface the microcontroller to SPI peripherals.
This paper will shortly recall the basics of SPI, it will also explain how to design a portable software driver in C language, and it will show a few waveforms of the SPI signals generated by the software driver. Then, it will try to define the limits of that implementation.
About the SPI bus
First of all, a few words on the SPI bus.
The SPI communication is serial and asynchronous, where a master device drives the bus and generates the clock, and decides when starting and stopping the data transmission. The SPI signals are:

    SCLK (SCK) : Serial Clock generated by the master
    SDI (MISO) : Serial Data Input (Master Input Slave Output) driven by the slave
    SDO (MOSI) : Serial Data Output (Master Output Slave Input), driven by the master
    CS : Chip Select, driven by the master to select the slave to communicate with (it can be omitted)

The master device, when it decides to transfer data to the slave device, first of all it asserts the CS (if implemented), the it serially transmits through SDO the first 8-bit command byte (usually the address and control bits) ed eventually the 8-bit or 16-bit data word. During that transaction the SDI is not used.
On the other hand, to transfer data from slave to master, the master device, after having asserted the CS, transmits a 8-bit command byte on SDO, and then it receives the 8-bit or 16-bit data word.
Implementing a driver for the SPI master
The software driver, implementing the master operations of the SPI interface, is made of 4 files:

    SPI_intrf.c , with all the application functions to read from and write to the slave
    SPI_intrf.h , the API (Application Program Interface) of the SPI_intrf.c module
    hw_intrf.c , with all the 'hardware-dependant' functions used by the SPI_intrf.c module
    hw_intrf.c , the API of the low level hw_intrf.c module, used by the SPI_intrf.c

The functions supplied by the user API are:

UINT16 SPI_write(UINT8 addr, UINT16 value)

it transfers a 16-bit value from master to slave, at the specified addr.

UINT16 SPI_read(UINT8 addr)

it returns a 16-bit value from slave to master, at the specified addr.

UINT16 SPI_init()
it initializes the driver.

How the driver works
Next figure shows the SPI signals, captured by a scope, implementing a master-to-slave transaction.
On the upper portion of the screen you can see several writing from master to slave, each one separated by CS=1, which is active low.
On the lower part, you can see the clock in relation with data. The bitrate is about 2.4MHz.
Iti is also possible to decode at glance the transmitted addr value, which is 0x70 (MSB transmitted as first)

software_driver_for_SPI_interface

Driver limits
The driver can be easily ported to any microcontroller having 4 GPIOs available: 3 outputs (SCLK, SDO, CS) and 1 input (SDI). CS, as previously noticed, can be omitted.
The clock frequency derives from the processor speed; in particular, in the above example the frequency is 2.4MHz, a fairly high value, but compatible with our peripheral. Often, the peripheral max frequency is 1MHz.
If lower frequency is desired, some delay has to be generated through a processor timer, or by inserting a software delay (like a loop or other) between the instructions generating the SCLK signal.
On the other hand, the software driver, specially when implemented in 'slow' processors, could generate a very low SCLK frequency: in that case the transfer speed will be fairly slow.
In Download section you'll find the Spi-source.zip

eostech  Umberto Calari, EOStech Srl

SPI driver

I am sorry eostech, but I fail to understand from this article which pins of which computer interface are you plotting in the images you attached. Are these pins of the parralel port? Are these the individually controllable pins of the serial port? The article does not mention them at all. Can you please clarify? Thanks!

Regards,
Cristian

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