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Simplify HDTV Design with STi Single-Chip MPEG Decoder

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Simplify HDTV Design with STi Single-Chip MPEG Decoder

The STi7100 provides high performance for low-cost high-definition systems.
The STi7100 is a single-chip, high-definition STB decoder that includes: graphics engine and dual display: high-definition (HD) and standard definition (SD), transport filtering and descrambling, video decoder: H.264/AVC and MPEG-2, ST40 CPU core (266 MHz), audio decoder.
The STi7100 includes the embedded interfaces: DVI/HDMI output, digital audio and video auxiliary input, USB 2.0, serial ATA, modem.

Simplify HDTV Design with STi Single-Chip MPEG Decoder

Based on Omega2 architecture, the STi7710 is a good solution for satellite and cable high-definition set-top boxes compliant with DCII, DIRECTV, DVB, OpenCable and ATSC specifications. STi7100 can decode, decrypt and demultiplexe a SD video stream or a single HD associated multichannel audio.

The STi7100 includes a graphics rendering and display capability with a 2D graphics accelerator, a cursor plane and two graphics planes. The STi7100 also includes a stream merger to accept five different transport streams from separate sources to be merged and processed concurrently.

Read more on STi7100 - Low cost HDTV set-top box decoder for H.264/AVC and MPEG-2
Read more on HDTV (high definition television) & Digital TV Introduction

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