Scilab/Scicos The Code Generator for FLEX
Scilab/Scicos Code Generator for FLEX
This page contains the information related to the Scilab/Scicos code generator for the FLEX Board.
Main idea: Develop a single-click digital control automatic code generation tool for FLEX!
Install steps
To install the Scilab/Scicos code generator toolchain, please follow the steps described in the following paragraphs:
1. If you have installed a previous version of Erika Enterprise, please save any modification done to the Evidence install directory, which is typically stored in the directory c:/
2. If you have installed a previous version of Erika Enterprise, please uninstall it by pressing on the Uninstall menu item in the in the Evidence menu. Then, please remove by hand everything which has been left on your Evidence directory.
3. Download Erika Enterprise Basic 1.4.1 from the Evidence web site at the URL http://www.evidence.eu.com/content/view/129/135/.
4. Install Erika Enterprise Basic 1.4.1 as explained in the documentation available on the Evidence web site, and in particular in the Erika Enterprise Tutorial for dsPIC (R) DSC.
5. Please follow exactly the instructions at the previous point. In particular, please remind to install the Microchip MPLABIDE and the C30 Compiler before installing Erika Enterprise Basic.
6. Download the scicos_pack_v4.zip from the Evidence web site.
7. Unzip the file on the desktop. A set of directories are created: scicos_examples, scilab, and user. You need to copy these directories in various positions on your hard disk.
8. Please check that the file c:/
preference_pic30__path_for_asm_compiler =
C :\\ Programmi\\ Microchip\\ MPLAB ASM30 Suite
preference_pic30__path_for_gcc_compiler =
C :\\ Programmi\\ Microchip\\ MPLAB C30
Please note to use a double backslash and not a single backslash!
9. Download and install Scilab 4.1.1 binary version for Windows from the web site
http://www.scilab.org. Please use an install directory which does not contain spaces: C:/Programmi/scilab-4.1.1 is ok, whereas C:/Program Files/scilab-4.1.1 is not.
10. Erase the contrib directory inside your Scilab installation, and replace it with the scilab/contrib directory you just unzipped. This step copies the code generator and the palettes for FLEX inside the Scicos install directory.
11. Copy the content of the user directory inside your c:/Documents and Settings/username directory. This step will add a .scilab file inside the Scilab environment directory. The new .scilab is used to display the palettes of the code generator for FLEX.
12. Copy the scicos_examples directory in a useful place, e.g. c:/.
13. Your Scilab/Scicos installation is now ready to produce code.
Creating the SCICOS example files
This Chapter will guide you to the creation, compilation and execution of a first simple Scicos example on a FLEX board. The example created in this tutorial can be found in the directory scicos_examples/led_sin.
If you are looking for a prebuilt example, go directly to Section 4.2.
1. Please start Scicos 4.1.1 from the Start menu. The Scilab window appears.
2. Type “scicos();” and press Enter.
3. The Scicos windows appears.
4. Select Palettes from the Edit menu.
5. A little list appear in place of the menu. Select DSPIC-Lib, which is the last entry.
6. A windows appears, with all the blocks which are specific for the dsPIC and the FLEX board
7. Single click on the LED block. The window selection moves to the Scicos window. The mouse now becomes a white rectangle of the dimension of the LED block. Single click somewhere in the white part of the window. A LED block is dropped in the diagram.
8. Repeat the same with the Sine block, placing it on the left of the LED block.
9. Link the black triangle of the Sine block to the black triangle of the LED block. To do that, press l, then single click on the triangle of the Sine block (the source), then click again on the triangle of the LED block (the sink).
10. Now open the Events Palette, which can be found il the palette list
11. Now connect the clock signal to the two blocks. To do that, single click on the red triangle of the clock block, then single click below it, then single click over the Sine block, then click on the red triangle of the Sine block. After that, single click on the line below the clock block, then over the LED block, then on the red triangle of the LED block.
12. Single click on the Clock block. Its properties window appears. Leave them untouched, and press OK. You can do the same on the Sine block.
13. The code generator can produce code which only comes from a special block named Super Block. For this reason, we need to create a Super Block enclosing the Sine and the LED blocks. To do that, select the Region to Super Block menu item from the Diagram menu. Then, draw a selection which includes the Sine, the LED, and the red lines in a way that only one red line exits the selection.
14. As a result, a Super Block is created, which contains the Sine and LED blocks. To see these blocks, just single click on the Super Block, and another window will appear. Please note that this window is very similar to the previous one except that the clock object is substituted by a placeholder signed with the number 1.
15. It is now time to save the two diagrams. From the Diagram menu, choose Save as. First save the Super Block diagram as myblock.cos, then close the window, and then save the diagram containing the Super Block as led_sin.cos. Please save them in the same directory!
It is now time to generate the code for the example we just created.
1. Select EmbCodeGen from the CodeGen menu.
2. A window appear, like the one in Figure 4.18. You can specify the directory where all the files will be created by modifying the Created files Path textbox. Please leave the other options unchanged.
3. Press Ok. As a result, a set of files are generated in the output directory.
4. Then, Scicos automatically opens a console window, running in it the following commands:
• the RT-Druid template generator to instantiate the Scicos template application;
• the RT-Druid standalone code generator to produce the Erika Enterprise Basic configuration files from the generated OIL file;
• the make application to compile the code.
5. The result of the code generation process. The executable file is named pic30.elf and it is located inside the Debug directory as usual for all
the Erika Enterprise Basic applications.
Figure 4.6: The LED block is dropped in the design window.
preference_pic30__use_evidence_compiler_4_deps = true
preference_pic30__use_evidence_compiler_4_compile = true
6. You can now program your application on your FLEX board. To do that, you need to open MPLABIDE as you usually do to program other Erika Enterprise Basic applications. Please refer to the Erika Enterprise Basic tutorial for dsPIC (R) DSC for more information.
Warning: If the ELF file fails to import on the MPLABIDE, try to use the C30 compiler recompiled from the Microchip sources by setting the following variables in the file c:/
preference_pic30__use_evidence_compiler_4_deps = true
preference_pic30__use_evidence_compiler_4_compile = true
7. Running the code on your FLEX board has the following behavior: the system led on the board flashes with a period of 20 seconds, and a duty cycle of around 6 seconds over 20. The explanation is the following:
• The system works like a synchronous control system, with a sampling frequency of 0.1s
• The Sine block output is a sinus with a frequency of 0.05, which correspond to a period of 20s.
• The LED block is directly linked to the system led, and is programmed to put on the system led when its input is greater than 0.5.
• It is clear that the sinus has a value greater than 0.5 for around a third of its period. Given that, the system led is on for around 6 seconds over 20.
5.1 Templates and customization of the generated application
The default application wich is generated by the Scicos embedded code generator for dsPIC (R) DSC generates a basic application which uses Erika Enterprise Basic with the FP kernel, a periodic task and an Alarm triggered by a timer interrupt to activate it. In general, it is likely that advanced users would like to customize the application which is generated by the code generator, to add other activities to be executed concurrently with the code generated from the Scicos design. Examples of this activities could be for example background activities for reporting, supervision, display, debug, and so on. Implementing such variations is very easy, because the application scheleton used by the code generator is contained inside a RT-Druid template. In particular, the default template is the pic30_empty_scicos template stored inside the examples/pic30/pic30_scicos directory under the Erika Enterprise install tree. The user can add a new template using the following steps:
1. Copy the examples/pic30/pic30_scicos directory in another location under the examples directory;
2. Change the ID of the template by modifying the template.xml file contained inside the directory. The ID is specified in the second line of the XML file as follows:
< evidence_example version ="1" ID =" pic30_empty_scicos">
3. Change the files included in the new template. If you need to add a new file, please remember to add it in the corresponding list in the template.xml file.
The code generated by the Scilab/Scicos code generator for FLEX uses the template named pic30_empty_scicos, and has the following symplifing assumptions:
1. There is a single sampling time Ts in the system;
2. Ts is forced to 1 ms;
3. Every sampling time specified by the user under the Scicos design will be rounded to a multiple of a millisecond;
4. An Erika Enterprise counter is linked to the a periodic timer;
5. The periodic timer used in the dsPIC hardware is set to raise an interrupt every 1 ms;
6. An Erika Enterprise alarm is attached to the counter, to periodically activate a task;
7. The task body just calls the routines generated by the Scicos code generator. Which executes the functions you specified in the design;
8. The PWM object has a fixed period of 1 ms. This means that if the sampling period is a multiple of Ts, then the PWM will repeat the same duty cycle until the PWN value is changed;
9. The A/D converter always works “on demand”, meaning it always executes the following steps:
• selects a channel;
• starts the conversion;
• waits for the end of the conversion (typically max 10μsec)
• it converts the result in a value from 0.0V and 3.3V
10. To speedup the compilation process, the default configuration does not produce the dependency files and the .src file from every .c file.
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