§10. OPTION REGISTER : Bank 1 (81h); 3 (181h)

Another very important register is the one that deals with Timer0 prescaler/postscaler (that is shared with the watchdog), of the Timer0 itself of the pull-up's external interrupt. Here is in the following table the meaning of every bit, that, in this case are all readable and writable.

§11. The interrupt

What is the interrupt? The interrupt is nothing but an electronic signal (external or internal for the device) that allows to interrupt the normal execution of the program in order to execute another one “parallel”, and in the end of this, resume with the mane program from the point in which was left.

The interrupt are often used where is necessary to give priority of intervention to a specific signal, or to wait the execution of a procedure slower than the mane one and are implemented in the PIC's hardware and can be activated/disactivated upon requirements.

§12. The interrupt's control registry (INTCON) : Bank 0 (0Bh); 1 (8Bh); 2(10Bh); 3 (18Bh)

This registry is present on all the memory banks (see paragraph 07).

Here is the meaning of every bit:

§13. Activation interrupt peripherals (PIE1) : Bank 1 (8Ch)

This registry activates the single devices activated through the 6 bit of INTCON (see paragraph 12).

§14. Flags for the identification of the peripheral that caused the interrupt (PIR1) : Bank0 (0Ch)

This registry preserves the flags of the devices that have caused an interrupt, among those listed in the previous PIE1 registry (see the previous paragraph).

ATTENTION! It's important to note that the flag comes set the same apart from the condition of the corresponding bit, of course, in case of deactivated interrupt it will not be generated the relative interrupt.

§16. Interrupt of writing on the EEprom (PIE2) : Bank 1 (8Dh)

This registry is, practically, set up by only one bit that activates/deactivates the interrupt of the end of the writing on the EEPROM.