Getting started with the PIC24HJ32GP202/204 and PIC24HJ16GP304 family of 16-bit microcontrollers requires attention to a minimal set of device pin connections before proceeding with development.
The PIC24HJ32GP202/204 and PIC24HJ16GP304 CPU modules have a 16-bit (data) modified Harvard architecture with an enhanced instruction set and addressing modes. The CPU has a 24-bit instruction word with a variable length opcode field. The Program Counter (PC) is 23 bits wide and addresses up to 4M x 24 bits of user program memory space. The actual amount of program memory implemented varies by device. A single-cycle instruction prefetch mechanism is used to help maintain throughput and
provides predictable execution.

All instructions execute in a single cycle, with the exception of instructions that change the program flow, the double word move (MOV.D) instruction and the table instructions. Overhead-free, single-cycle program loop constructs are supported using the REPEAT instruction, which is interruptible at any point.

The PIC24HJ32GP202/204 and PIC24HJ16GP304 devices have sixteen, 16-bit working registers in the programmer’s model. Each of the working registers can serve as a data, address or address offset register. The 16th working register (W15) operates as a software Stack Pointer (SP) for interrupts and calls. The PIC24HJ32GP202/204 and PIC24HJ16GP304 instruction set includes many addressing modes and is designed for optimum C compiler efficiency.

Read more: http://ww1.microchip.com/downloads/en/DeviceDoc/70289C.pdf?from=rss