09 Transmision
Transmission
The ENC28J60, at the MAC level, it is occupied to generate the Preamble, SFD field, the eventual padding and the FCS; all the rest must be inserted by the software in the transmission buffer. Also, the byte which stays in the first buffer memory location, is a control byte and it isn't really send. Using zero like the value of this byte, are used, for the transmission, the options already imposted in MACON3.
We had defined the transmission buffer in a way that begins at TX_BUF_START address, so the operations to follow for the MAC heading preparation are:
- Arrange the EWRPT registers in a way to point at the TX buffer beginning .
- Sending the WBM command you can begin to write the dates in the buffer (between spiWrite.
- Write the control byte ( for example zero).
- Follow the recipient MAC address, that one of the sender, at last Type/Length field.
The function which performs this operation is MACPutHeader:
void MACPutHeader(MACAddr target, u16 type){
u8 i;
bufSize = sizeof(MAC_Header);
setBank(0);
writeReg(EWRPTL, LOW(TX_BUF_START));
writeReg(EWRPTH, HIGH(TX_BUF_START));
CS = 0;
spiWrite(WBM);
spiWrite(0x00); // usa MACON3
for (i=0;i<6;i++)
spiWrite(target.b[i]);
spiWrite(MY_MAC1);
spiWrite(MY_MAC2);
spiWrite(MY_MAC3);
spiWrite(MY_MAC4);
spiWrite(MY_MAC5);
spiWrite(MY_MAC6);
spiWrite(HIGH(type));
spiWrite(LOW(type));
CS = 1;
}The MAC_Header and MACAddr structures are defined in the file MAC.h:
#define TYPE_ARP 0x0806
#define TYPE_IP 0x0800
typedef struct _MAC_Addr {
u8 b[6];
} MACAddr;
typedef struct _MAC_Header {
MACAddr destMAC;
MACAddr sourceMAC;
u16 type;
} MAC_Header;
So the MAC heading is ready; now can be send to the controller the superior level dates.
After this last operation, the packet is ready to be really send; this result reached with a little instructions:
- Wait until the controller is ready to transmit observing the TXRTS (3) bit of the ECON1 register.
- The ETXND registers are charged with the address of the last byte to send. This address will be TX_BUF_START + bufSize.
- Setting the TXRTS bit begins the transmission.
Because of a problem described in the Errata, if the errors are verified (bit EIR.TXERIF), is necessary to reset the transmission logic, with the TXRST (7) bit of ECON1.
void MACSend(){
setBank(0);
if (readETH(EIR) & 0b10) { // if it was verified an error
BFSReg(ECON1, 0b10000000); //
BFCReg(ECON1, 0b10000000); // reset the TX
}
while(readETH(ECON1) & 0b1000); // wait that is ready to send
writeReg(ETXNDL, LOW(TX_BUF_START + bufSize));
writeReg(ETXNDH, HIGH(TX_BUF_START + bufSize));
BFSReg(ECON1, 0b1000); // send
}


