Freescale Semiconductor has recently added two new devices to the QorlQ P1 Multiprotocol Communication Processors Family: the P1021 (dual core) and the P1012 (single core). Both processors are based on the 45 nm technology, able to achieve extremely low power consumption, with a core providing very high performance in a frequency range from 533 MHz (single-core) to 800 MHz (dual-core). They also include advanced security features, and are provided with a rich set of peripherals. These kinds of processors are well suited for networking, telecom, defense, and industrial applications. Both P1021 and P1012 processors are based on the QUICC Engine multiprotocol technology and are pin-to-pin compatible with the former models P1011, P1020, and the P2 platform products (including the P2020 1.2 GHz dual-core processor), thus offering a product family with high performance and low power consumption. Pin-to-pin compatibility among several devices allows also designing and delivering of products with an extended level of performance, maintaining the same board design. The main characteristics of the two fresh products can be summarized as follows:

• Single (P1012) and dual (P1021) high-performance e500 cores, built on Power Architecture® technology:
  • 36-bit physical addressing
  • Double-precision floating-point support
  • 32 KB L1 instruction cache and 32 KB L1 data cache for each core
  • 533 MHz to 800 MHz core clock frequency
• 256 KB L2 cache with ECC, also configurable as SRAM and stashing memory. This L2 cache is full configurable, since it can be partitioned between the two cores, or configured as SRAM, or configured as stashing memory
• Three 10/100/1000 Mbps enhanced three speed Ethernet controllers (eTSECs). The three Ethernet ports support advanced packet parsing, flow control and quality of service features, as well as IEEE® 1588 time-stamping—all ideal for managing the datapath traffic between the LAN and WAN interface
• TCP/IP acceleration and classification capabilities:
  • IEEE® 1588 support
  • Lossless flow control
  • RGMII, SGMII. RGMII (acronym for Reduced Gigabit Media Independent Interface) identifies a particular interface between an Ethernet MAC and PHY which uses half the number of data pins as the GMII. SGMII (acronym for Serial Gigabit Media Independent Interface) is also a standard interface for connecting Ethernet MAC and PHY and is used mainly for Gigabit Ethernet (SerDes)
• High-speed interfaces (not all available simultaneously) such as: four SerDes, two PCI Express controllers, two SGMII interfaces
• QUICC Engine module (UTOPIA-L2), up to two 10/100 Ethernet interfaces, up to four T1/E1/J1/E3 or DS-3 serial interfaces, up to four HDLC interfaces with 128 channels of HDLC, up to four BISYNC interfaces, up to four UART interfaces, SPI interfaces, GPIO
• High-Speed USB controllers (USB 2.0) Host and device support
• Enhanced secure digital host controller (eSDHC) and support for implementing SD/MMC local storage feature
• Serial peripheral interface
• Integrated security engine (SEC 3.3) with support for 3DES, AES, RSA/ECC, MD5/SHA, ARC4. Authentication for common security protocols (IPsec, 3GPP, SSL, SRTP, WiMAX, and other networking and wireless security protocols) is also provided
• 32-bit DDR2/DDR3 SDRAM memory controller with Error Correction Codes (ECC) support, an important requirement for high-reliability systems

The following picture shows the QorlQ P1012 and P1021 block diagram:

The QorlQ P1021 dual-core processor supports both symmetric and asymmetric processing: that means the two cores can be used to execute the application tasks (which are typically processes, from the operating system point of view) in a concurrent or in a sequential order, depending on the particular application.

Freescale QorlQ platforms roadmap

QorlQ platforms P1 and P2 are the natural evolution of the Freescale PowerQUICC® family of communications processors. They rely on high-performance Power Architecture® cores, and are particularly tailored for networking solutions where reliability, security and quality of service are mandatory requirements. P1 and P2 platforms belong to the QorlQ roadmap, which includes five platforms (P1, P2, P3, P4 and P5) offering a wide range of single and dual core solutions to the customers, with the option to choose a multicore architecture today or easily migrate to it in the future. The next processors of these families will be based on 32 nm technology, or behind, as shown in this picture:

Freescale is a world leader in the single and multi-core communication processor segment, with over 250 millions devices delivered; the QorlQ platform enforces Freescale’s leadership by providing high performance levels with low power consumption, as shown in the following graph:

The QorIQ™ P1021/P1012 Modular Development System (MDS)

The P1021 and P1012 Modular Development System offers to hardware and software designers a tool to accelerate the development and testing of a system based on the P1021/P1012 QorIQ™ processors, thus significantly improving the time to market. The P1021/P1012 MDS provides:

• Silicon bring-up/verification
• Software application development and support
• Performance benchmarking
• Processor evaluation

The P1021/P1012 MDS consists of the following components:

• a P1021/P1012 processor board that can be directly inserted into a PC as PCI Express end point device. The processor board (see below picture) allow developers to upload, run and debug the code, set breakpoints, display memory and registers, and so on

• a platform I/O board
• several expansion modules which add support for TDM and ATM:
  • PQ-MDS-T1 with support for E1/T1, DS3, T3 I/F with an option of two POTS analog telephone lines
  • PQ-MDS-QOC3 with support for up to 4x 155 Mbps optical transceivers for evaluating the UTOPIA L2 /POS bus
  • PQ-MDS-PCI with single-slot PMC to PCI agent connector to enable additional PCI-based oards for evaluation (actual for MDSs with legacy PCI I/F functionality)
  • PQ-MDS-PCI Express: an expansion module supporting multiple PCI Express agents

Reference

QorIQ Communications Platforms

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