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Motor Control Evaluation Board Using FSB50450 in a Tiny-DIP Package

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This reference design supports the FSB50450, Motion-SPM in a Tiny-DIP package evaluation board. It should be used in conjunction with the FSB50450 data sheet.

Printed Circuit Board

PCB Map

FSB50450_pcb_map

Circuit Layout Design

1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2–3cm)
2. All the by-pass capacitors and filter capacitors should be placed very close to SPM.
3. The isolation distance of DC-P, U-phase, V-phase, W-phase, DC-N/GND blocks should be over 2.54mm(100mil) for 300V~500V P-N voltage.
4. Power-GND and signal-GND should be connected with each other through only one 1.5~2mm width pattern.
5. To prevent surge destruction, the wiring between the filter capacitor and the P & Ground pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1~0.22µF between the P & Ground pins is recommended. In addition to reducing local voltage spikes, the placement and quality of this capacitor will have a direct impact on both conducted and radiated EMI.
6. To prevent over temperature destruction, the cooling is an important issue users have to be aware of

Wiring of PCB

FSB50450_wiring_pcb

Recommended Cooling Method of Motion-SPM in Tiny-DIP

The TINY-DIP package is an extremely compact package for above 100W applications and this package does not contain a screw hole, and therefore, cooling and heat-sink installation are important elements of this design. Users must be careful.  Temperature rise of power semiconductors is due to the non-ideal effects of switching devices (IGBT, MOSFET and diode, etc). When the switching devices are turned on, there is a forward voltage drop which leads to Power Loss = (Conduction current) • (Voltage drop) and there are switching losses due to the finite rise and fall time of current and voltage during switching period. These total power losses in the devices make the case temperature rise with the thermal resistance of each package according to the below formula.

TJ – TC = Power Loss / Thermal Resistance

FSB50450_test-board

Bill of Materials

FSB50450_bom

Source: http://www.fairchildsemi.com

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