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Logic Analyzer Set-up

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The ultimate goal is to create a FPGA logic analyzer for the home. The system would include actual analyzer for a Spartan 3 FPGA and PC software for the user. This employs materials that are easily accessible. Its features include channels for sampling rates, external clock and sample memory. There are four stage triggers for complex serial and parallel and add-ons that are Java based viewing software for protocol analysis. The basic starter kit would be Xilinx Spartan 3 Starter Kit with a propagation delay with plenty connectors to be used as signal inputs. The low cost would be a good investment for the PC. The next step would be programming the VHDL code and introducing the Communications Protocol for the logic analyzer. To access the device, connect it to a serial port and use a java client to input the necessary information. All the other necessary software is downloadable, like the GNU GPL. Some other downloads can be used to test the system and some others can be used without need for testing. These include the Altera DE2 and the Spartan 3E.

SOURCE: http://www.sump.org/projects/analyzer/

A good design

It is a good idea to have a low-cost home-made logic analyzer. I have checked its performance:

16 channels at 200MHz sampling rate
32 channels up to 100MHz sampling rate
state analysis up to 50MHz using external clock
256K Samples memory
noise filter
complex serial and parallel trigger with four stages
externally available sampling clock to drive add-ons (like ADCs)
connects via EIA232/RS232 (works with usb to serial adapters)
Java based viewing software (see PC Client for details)
I2C & SPI protocol analysis

Its connection (RS232) maybe too slow. A USB 2.0 connection is better.

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