In multi-voltage architectures, coordinated management of power supplies is necessary to avoid potential problems and ensure reliable performance. Power supply designers must consider the timing and voltage differences between core and I/O voltage supplies during power up and power down operations. Sequencing refers to the order, timing and differential in which the two voltage rails are powered up and down. A system designed without proper sequencing may be at risk for two types of failures. The first of these represents a threat to the long term reliability of the dual voltage device, while the second is more immediate, with the possibility of damaging interface circuits in the processor or system devices such as memory, logic or data converter ICs.

Another potential problem with improper supply sequencing is bus contention. Bus contention is a condition when the processor and another device both attempt to control a bi-directional bus during power up. Bus contention may also affect I/O reliability. Power supply designers should check the requirements regarding bus contention for individual devices.

TPS62260
· High Efficiency Step Down Converter
· Output Current up to 600mA
· Power Save Mode at Light Load Currents
· Allows < 1 mm Solution Height

TPS62290
· High Efficiency Step Down Converter
· Up to 1-A Output Current
· Power Save Mode at Light Load Currents
· Output Voltage Accuracy in PWM mode ±1.5%

TPS62231
· 3 MHz switch frequency
· Up to 94% efficiency
· Output Peak Current up to 500 mA
· Small External Output Filter Components (1.0mH/ 4.7mF)
· Small 1 ´ 1.5 ´ 0.6mm3 SON Package
· Fixed 1.8 V eliminates need for external voltage-setting resistors

High-Efficiency Power Solution Using DC/DC Converter for the DM365