Welcome to the training module on Allegro MicroSystems’ Constant Current LED Driver with Programmable PWM Control. This training module introduces the three channel constant-current LED driver family, its internal function and features, and some design considerations.

Led Driver and PWM Overview

The A6280 and A6281 LED drivers from Allegro MicroSystems are three-channel constant-current LED driver ICs with programmable PWM brightness control. These devices are ideally suited to driving clusters of red, green, and blue (RGB) LEDs in applications where a cluster forms a single pixel in a large display or lighting fixture. It precisely controls LED brightness via 10-bit pulse-width modulation (PWM) per channel, complemented by 7-bit analog current control per channel to adjust color balance. The LED drivers are designed to minimize the number of components needed to drive LEDs with large pixel spacing. A large number of these devices can be daisy chained together and controlled by four control signals (clock, serial data, latch, and output enable). Each of these inputs is buffered to drive the next chip in the chain.

Functional Block Diagram

The LED drivers have three 10-bit registers to store brightness data of the PWM signal for each LED and a 31-bit shift register that loads data through the serial data in (SDI) pin. All the internal latched registers are loaded by this shift register. The LED drivers also have a built-in linear regulator that eliminates the need for a chip supply bus and external voltage regulators. The driver is designed to allow daisy chaining many drivers together. Internal output buffers allow data signals to travel long distances through strings of the LED drivers without needing extra driving hardware.

31 bit shift register driver

The LED drivers have three 10-bit registers to store brightness data of the PWM signal for each LED and a 31-bit shift register that loads data through the serial data in (SDI) pin. All the internal latched registers are loaded by this shift register. The LED drivers also have a built-in linear regulator that eliminates the need for a chip supply bus and external voltage regulators. The driver is designed to allow daisy chaining many drivers together. Internal output buffers allow data signals to travel long distances through strings of the LED drivers without needing extra driving hardware.

Output buffer

This LED driver family is designed to allow daisy chaining many LED drivers of same family. Clock, data, latch, and output enable signals are passed from one A6820 to the next without any loss of data due to duty cycle skewing or signal degradation. Output buffers drive data signals enough for long distances without needing extra hardware. The device drives TTL levels. Each driver input has a corresponding buffered output. The CO (Clock Out) pin is driven by an internal one-shot circuit. The one-shot solution produces a consistent clock signal throughout the entire driver chain to assure synchronization of the data line.

PWM Brightness control

This LED driver family controls the intensity of each LED by pulse width modulating the current of each output. It has three 10-bit brightness registers, one for each output. These brightness registers set the PWM count value at which the outputs switch off during each PWM cycle. Each 10-bit brightness register gives 1023 levels of light intensity. From the table shown, when the brightness register is set to zero, the outputs remain off for 0% DC. When a brightness register is set to 1023, the corresponding LED remains on (100% DC) as long as OEI is active and the PWM cycle has started. The PWM counter increments from zero only when the OEI pin is held low. The counter resets to zero on a rising edge of CI when OEI is high.

Output current selection

The overall maximum current is set by the external resistor, REXT , connected between the REXT and Logic GND pins. Once set, the maximum current remains constant regardless of LED voltage variation, supply voltage variation, temperature, or other circuit parameters that could otherwise affect LED current. The relationship of the value selected for REXT and IOUT is shown in the figure.

Dot correction control

The LED driver family can further control the maximum output current for each output by setting the three 7-bit dot correction registers with scale data that ranges from 36.5% to 100% of the overall maximum output current that is set by the REXT resistor. This feature is useful because not every type of LED (red, green, or blue, for example) has the same level of brightness for a given current, and the brightness could be different even from LED to LED of the same type. By scaling the output currents so that all the LEDs have matched intensities, the application will have full color depth when using the PWM counters.

Other features

When the junction temperature of the LED driver reaches the thermal shutdown temperature threshold, the outputs will shut off until the junction temperature cools down below the recovery threshold. The shift register and output latches will remain active during the TSD event. Therefore there is no need to reset the data in the output latches. The LED driver has an internal undervoltage lockout (UVLO) circuit to disable the driver outputs in the event of the logic supply voltage dropping below a minimum acceptable level. This prevents the display of erroneous information, a necessary function for some critical applications. The shift register will not shift any data in a UVLO condition. Upon recovery of the logic supply voltage and on power up, the internal shift register and all latches will be set to zero. The voltage on the outputs should be kept in the range 1 to 3 V. If the voltage goes below 1V, the current will begin to roll off as the driver runs out of headroom. At VOUT above 3 V, the power dissipation may become a problem. The series resistors can be added to dissipate the extra power and keep the output voltage within the recommended range.

Timing Considerations

When the junction temperature of the LED driver reaches the thermal shutdown temperature threshold, the outputs will shut off until the junction temperature cools down below the recovery threshold. The shift register and output latches will remain active during the TSD event. Therefore there is no need to reset the data in the output latches. The LED driver has an internal undervoltage lockout (UVLO) circuit to disable the driver outputs in the event of the logic supply voltage dropping below a minimum acceptable level. This prevents the display of erroneous information, a necessary function for some critical applications. The shift register will not shift any data in a UVLO condition. Upon recovery of the logic supply voltage and on power up, the internal shift register and all latches will be set to zero. The voltage on the outputs should be kept in the range 1 to 3 V. If the voltage goes below 1V, the current will begin to roll off as the driver runs out of headroom. At VOUT above 3 V, the power dissipation may become a problem. The series resistors can be added to dissipate the extra power and keep the output voltage within the recommended range.

Additional Resource

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A6280 Datasheet

A6281 Datasheet