Now that we started with VHDL let’s see another example full of empirical rules that help us to take out the hindrance.
A VHDL project
The most important rules in these type of design are:

Overview
I do not want to make a course about VHDL as a programming language for HW (there are a lot of books better than my words 1), because courses and specifics of languages are public and everyone can find them easily on the Net. I just want to give some suggestions / recommendations by whom, starting many years ago, has had to develop an endless series of projects at different levels of complexity .